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Standards Development
This document establishes the general technological process, items and specific methods for verification and validation of semiconductor integrated circuits, which is intended for space application. These methods list in this document can be used to integrated circuits, including ASIC.
The purpose of this proposed standard will define the procedures, items, and methods for verification and validation of semiconductor integrated circuits. This standard will help end-user to get whole information (failure models, data, application advise, etc.) about ICs, and identify application risk at early stage so as to mitigate it. This standard will also drive a new technology or a new product to be applied in space area. Many countries have recognized the importance of V&V for a new component or technology, and have published some standards to guide the implement. There are similarities and also differences, so it is necessary to find out a universal technical guide to promote the development of this technology.
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